Lessee what the highlights are:
-shared L3 cache
-quad-core
-independent voltage regulation of the cores as well as the northbridge
-48-bit addressing, 1GB page sizes
-official coprocessor support through an HTX connector.
-very flexible DDR2/DDR3/FBDIMM support
-memory mirroring
-data poisoning
-HT retry
-doubled FP units
-prefetch tweaks

AMD shows off details of K8L
"Next is memory. The new core will support 48-bit addressing and 1GB
pages. Cray and SGI will be very happy with this, until they hit that
memory wall again. There is also official co-processor support, strongly
hinted to be on a HTX card. The key here will be the platform is aware
of them vs having to hack them in."
http://www.theinquirer.net/?article=31761

Yousuf Khan

Yousuf Khan

Yousuf Khan wrote:
I'd be careful, there are no indications that the K8L will have any
more execution units. Only that the execution bandwidth doubled to
2x128b SSE ops/cycle.

DK