I have an intel E4300 on asus P5PE-VM with some DDR 500 memory (PC4000) in
single channel mode.

When at default bus speed 200Mhz, sisoft sandra memory bandwidth test
reports bandwidth of 2918 MB/s
Using clockgen to increase bus speed to 250Mhz, sissoft sandra still says
the memory bandwidth is 29xx MB/s -- essentially, no change. How can this
be?

Phil Weldon wrote:
My take on it, is the results don't make much sense.

The P5PE-VM is an LGA775 board, which uses the previous generation 865G
DDR chipset. It has 1:1, 5:4, 3:2 memory dividers. The 865G officially
supports FSB800, and Asus is cheating when running the chip at FSB1066.
Apparently the internal graphics aren't stable at FSB1066, and this may
be due to however the graphics core is clocked with respect to the
hub clock.

According to posts I've read, if you plug an FSB800 processor into the
board, the Auto setting would select 1:1 for DDR400 RAM. If you plug a
FSB1066 processor, they use the 3:2 divider, and the RAM runs at
DDR355. They did that, because they could not run DDR400 RAM at
DDR426 with the 5:4 divider, with FSB1066.

Now, I thought the divider value stays fixed, once you go from the
BIOS to the OS. Using Clockgen, if an FSB800 processor is present,
and the RAM is running at DDR400, raising the clock from 200 to
250MHz, should be causing the RAM interface to run at DDR500. I
suppose you could check with CPUZ, to verify that, for what that is
worth. (CPUZ and Clockgen are written by the same author, so mistakes
could be consistent from program to program.)

So I don't claim to understand it - if the memory clock is higher, the
bandwidth should have changed as well. Both the processor and the
memory are running faster, and I would have expected different
results in each case.

The only conclusion you can reach, is somehow, the memory clock has
been dropped. And I don't see how that can be achieved in this case,
unless the design of Clockgen is changed. Or the BIOS is somehow
involved in the divider choice, while running live in Windows ?
Does Clockgen offer a slider for the memory clock, and was it
moved to a lower setting ? The choices for memory clock, should
be discrete ratios (as the clock is created inside the Northbridge).

I would have expected an 865G to fall flat on its face at DDR500.
It should have taken some tweaking to get it stable up there.
So for whatever reason, my suspicion is that the memory cannot
really be at DDR500. And I just don't see a mechanism to make that
change, once the BIOS choices have been made.

Paul

According to cpuz, FSB:memory is 1:1. And just in case you wonder, I was
able to increase the bus/memory from default 200Mhz to 280Mhz (no crashes
running hotcpu) using mushkin DDR500. At 285Mhz, the system freezes after a
few seconds. With DDR400 memory, it crash at 255Mhz. I wonder if I can push
it even higher if I have DDR600 memory. But I'll never find out, because I'm
going to spend the money on a ga965pds3 motherboard and ddr2 memory.

Back to the topic. I'm going to assume this mystery is a bug in sisoft
sandra, because I *decreased* the clock to 100Mhz, and sisoft still reported
memory bandwidth around 3000MB/s.

I use hotcpu's benchmark test, and the memory related figures do
increase/decrease with the bus speed as expected.

Thanks for the responses.