I'm running Windows 7 64 bit on my new semi-homebuilt PC. I replaced
the RAM that came with my bundle, 1 GB generic stick, with 2GB of
Buffalo Select, 800mhz, and then bought another about ten days later.
I didn't know that it's desirable to buy as a kit then. Can I expect
problems, or is it merely that buying a kit is ideal? To be fair, the
machine is running great, after a fortnight of instability when a 3
editions outdated BIOS was still installed and I think a wrong setting
for the RAM's bus speed in the BIOS.

This is what I get, that's relevant, from CPU-Z. Does this look
okay? I see the CAS latencies etc are different for both sticks,
unless the readings I get for my laptop, which is all stock parts.

Would 200mhz bus speed, if that is what the BIOS setting was for, be
right for PC6400 RAM? I think the auto setting I had before was
400mhz, and certainly it was not stable then. The Windows Experience
Index for what it's worth is 7.1. The motherboard is an Asus M2N68
SE2, the CPU an AMD X2 Regor Core 3 ghz. (Why does one of the lines
read PC6400 (400mhz)? It's confusing that 800mhz RAM has these two
other speeds...)
Many thanks in advance.

Chipset
-------------------------------------------------------------------------

Northbridge NVIDIA GeForce 7025 rev. A3
Southbridge NVIDIA nForce 630a rev. A2
Graphic Interface PCI-Express
PCI-E Link Width x16
PCI-E Max Link Width x16
Memory Type DDR2
Memory Size 4096 MBytes
Channels Dual, (Unganged)
Memory Frequency 200.9 MHz (1:1)
CAS# latency (CL) 5.0
RAS# to CAS# delay (tRCD) 3
RAS# Precharge (tRP) 3
Cycle Time (tRAS) 9
Bank Cycle Time (tRC) 12
Command Rate (CR) 2T
Uncore Frequency 1607.4 MHz

Memory SPD
-------------------------------------------------------------------------

DIMM # 1
SMBus address 0x50
Memory type DDR2
Module format Regular UDIMM
Manufacturer (ID) Melco (7F7F7F8300000000)
Size 2048 MBytes
Max bandwidth PC2-6400 (400 MHz)
Part number
Number of banks 2
Data width 64 bits
Correction None
Nominal Voltage 1.80 Volts
EPP no
XMP no
JEDEC timings table CL-tRCD-tRP-tRAS-tRC @ frequency
JEDEC #1 4.0-4-4-12-16 @ 266 MHz
JEDEC #2 5.0-5-5-18-23 @ 400 MHz
JEDEC #3 6.0-5-5-18-23 @ 400 MHz

DIMM # 2
SMBus address 0x51
Memory type DDR2
Module format Regular UDIMM
Manufacturer (ID) Melco (7F7F7F8300000000)
Size 2048 MBytes
Max bandwidth PC2-6400 (400 MHz)
Part number
Number of banks 2
Data width 64 bits
Correction None
Nominal Voltage 1.80 Volts
EPP no
XMP no
JEDEC timings table CL-tRCD-tRP-tRAS-tRC @ frequency
JEDEC #1 3.0-3-3-9-12 @ 200 MHz
JEDEC #2 4.0-4-4-12-16 @ 266 MHz
JEDEC #3 5.0-5-5-18-23 @ 400 MHz

poachedeggs wrote:
There was a time, when exact matching of DIMMs was an asset.

Some S939 boards (four DIMM slots), started life with dismal
BIOS installed. One board was so picky about matched RAM,
that it rejected running dual channel mode, because the
PCB revision field of the SPD table, was different. (The
PCB is the fiberglass material the memory chips are held on.)
Of course, checking such a field is pointless, but the BIOS
was doing it anyway.

Now, BIOS are more likely to concentrate on the specifics.

Back in the AthlonXP era, the memory controller was on the
chipset. The next step forward technologically, was S939 and
S754, with the memory controller moved to the processor itself.
The S754 was single channel. The S939 was dual channel
(or, the way AMD describes it, "supports 128 bit mode").

The AMD "128 bit mode" consists of running two DIMMs in
matched positions on their respective channels, as if
they were one DIMM which was 128 bits wide. You could
think of it as a freight train with two engines, but
one engine is "slaved" to the master engine, and just
does whatever the other one does. If the engineer of the
train cranks the throttle, both engines respond in a
similar way.

The "128 bit mode" requires that the rows, columns, banks,
and ranks match. An example of failing to match,
would be to buy a 1GB DIMM on Tuesday, with (8) 128Mx8
chips on it (a single sided DIMM). Then, on Friday, buying
a second 1GB DIMM, but this one has (16) 64Mx8 chips on it.
Both DIMMs have equal quantities of RAM, but the four
described dimensions above, would no longer match. If
identical commands were sent to both modules, one of the
modules would end up making mistakes. The BIOS checks
this carefully, and won't allow dual channel mode, if
the DIMMs don't match dimensionally.

Intel also designs memory controllers. They do memory
controllers for their LGA775 Northbridge chips. Some
of the latest ones of those support dual channel, but
some of the control parameters for the sticks (dimension
dependent ones), are more independent for each stick.
An Intel Northbridge (one that claims to support Flex
Memory), would accept a (16) 64Mx8 DIMM and a (8) 128Mx8,
and run 2x1GB dual channel mode.

The first instances of that kind of flexibility, might have
been created by Nvidia. The Nforce2 supports dual channel
mode in a similar way to Intel Flex memory, and perhaps
predates Intel using it.

Your AMD processor can support just about any kind of memory
configuration you can throw at it now. Ever since Revision E
processors were introduced, sometime in the S939 era, the
processor can operate arbitrary collections of DIMMS in
virtual single channel mode. If the user takes care to
match the DIMMs, then dual channel mode operation is
possible.

(For all I know, AMD might be supporting flex memory operation
now too, but I try to stay out of AMD's abysmal documentation
as much as possible. AMD just doesn't seem to be interested
in making readable documentation. Years ago, they were much
better at it.)

*******

Based on the information in your SPD dump above, the two DIMMs
appear to be dimensionally equal, but their SPD tables are
different. They do share a timing entry, fortunately,
which with some luck the BIOS can find and use. Or,
you could program this manually into your system, if
the BIOS botched the job.

5.0-5-5-18-23 @ 400 MHz

That is a DDR2-800 timing entry, where the first number
is "CAS 5". CAS 5 is the industry nominal value for CAS
for a memory like that. An enthusiast memory might be
CAS 4 or CAS 3, and if the CAS value gets too low, not
all memory controllers can take advantage of it. Lower
CAS, reduces the response time of the first word of
data from the DIMM. Using lower CAS memory, helps when
a program makes relatively random accesses to memory
(a pattern used by some event simulators).

Now, when we look at the top section of your CPUZ dump,
we see some strangeness. That isn't exactly 5-5-5-18-23.
It appears to be tighter for some reason, and a bit
more stressful.

CAS# latency (CL) 5.0
RAS# to CAS# delay (tRCD) 3
RAS# Precharge (tRP) 3
Cycle Time (tRAS) 9
Bank Cycle Time (tRC) 12

You can go into the BIOS and manually set those parameters
if you want. More notes here, on the memory timings.
They explain the "datasheet ordering", of
CL, tRCD, tRP, and tRAS (optionally tRC on the end).
tRC is the arithmetic sum of two of the other parameters,
and that could be why you don't see it in adverts.

http://en.wikipedia.org/wiki/Memory_timings

I'm amazed by what abuse memory can take, without throwing
a wobbly. I have a new motherboard here, where the BIOS
doesn't seem to be listening to my memory divider setting.
It ran my DDR2-800 CAS4 sticks at DDR2-1066 CAS4, when in
principle the memory might only have been good enough to
support CAS5 at such a high speed. And the system didn't even
crash :-) It is always a good idea to review what has happened
to the settings using CPUZ, as you can't trust the average BIOS,
further than you can throw it.

After any memory change, you should run something like
memtest86+ from memtest.org , for at least two complete
passes. The best test in that program (or at least, where
I see memory errors), is Test 5. Don't boot into Windows,
until at least memtest86+ is clean (error free). I've had
one respondent here, who had his Windows install corrupted,
even after memtest86+ was clean, so this is not a guarantee -
it is more "the best you can do in the circumstances". I also
use Linux LiveCDs for testing, which is safer than making Windows
my guinea pig for the first test. With those, there is no
hard drive to corrupt, and you can even run the Linux version
of the Prime95 stress test from there (mersenne.org/freesoft).

Paul

"poachedeggs" <poachedeggs (AT) hotmail (DOT) co.uk> wrote

^ This seems bad to me...

I think I have one with 2.0 for my Desktop-PC (not laptop ! ) !?!?

(Lower=better)

Bye,
Skybuck.

Skybuck Flying wrote:

CAS Latency is measured in clock ticks. You have to
multiply the CAS Latency by the clock period, to get
the delay in nanoseconds. Once both memory products
have been converted to nanoseconds, then you can compare
them.

It isn't fair to compare just the CAS number, since
the value depends on the clock. The clock speed of
the OPs memory is faster than yours, which means his
clock period is less.

http://www.xbitlabs.com/articles/mem...r_3.html#sect0

http://www.xbitlabs.com/articles/mem...3_2.html#sect0

If we compare the best available memory options from
DDR, DDR2, DDR3, then scale them properly for
frequency, we get CAS2, CAS1.5, CAS1.5, meaning
the newer technologies have lower latencies possible
than yours. For example, there is a PC3-19200 memory
with CAS9, and when you scale that to 3200, that is
equivalent to CAS1.5 at PC3200.

You can see the gradual improvement in "First Word" available
in the table here.

http://en.wikipedia.org/wiki/CAS_latency

Paul

Amazing response - I think I follow it as well as I need to, just
about. :-)

If I run by you some stuff from my BIOS can you give an opinion
though, of whether I've got things entered correctly now. (If it's
relevant this is an American Megatrends BIOS version 02.61.)

The memory-relevant sections begin under Jumper-Free Configuration. I
have Memory Clock Mode set to Manual, now, that is. Everything was
set to auto when there was little stability. Then there is Memclock
Value, with a choice of 200 mhz, 266, 333, 400 and 533. I had it set
to 200mhz before (told perhaps wrongly that this is the bus speed of
800mhz RAM and what should be entered here) but now it's set to 400 as
I imagine this corresponds to the @400 I see in CPU-Z?

Then it's DRAM timing mode, with a choice of Auto, DCT 0, DCT 1 and
Both. Flummoxed, I tried all three and started to I think understand
that Both meant both sticks of RAM, as this is the only setting that
lets me choose 5,5,5,18,23 twice. There are quite a few others
categories though, e.g. Trrd, most of these have what looks like a
hexadecimal address and a time, but some have the same sort of range
as TRCD, i.e.2 to 6 or 7 (I didn't quite make enough notes, sorry).
But I've left everything to auto that isn't covered by the categories
that seem to want to be set to 5,5,5,18,23 as far as I understand.

No crash yet with this change, but CPU-Z still has different readings
for both sticks. I was going to swap the sticks round tomorrow out of
curiosity, if that would be of any use. I should look on the stick
itself to make sure tey're both CL5, maybe? As they were ordered from
the same click on the Offtek website.

As long as it's stable and I have this pretty good WEI set of scores
I'm happy, but I had just posted here to make sure nothing's seriously
up, or indeed that I should send the second stick of RAM back, which
would annoy me as I've already returned a stick of Elixir to the same
people. I realise they can't go through all their Buffalo looking for
my first stick's twin. Excuse any naivety, I do like to sort my own
computer problems out and not go to a shop but I also am not driven to
become too technically minded, admirable though that is in anyone so
inclined...

Sometimes the post screen is quite garbled very briefly, that is the
colours are all wrong and the words placed in a random bit of the
screen. This has seemed to happen usually after a setting change.

Thanks for any further input.

words placed in a random bit of the
(...And one other thing, if it turns out that one stick is CL5 and the
other CL6, is CL6 'poorer' functionally? If so, particularly if the
CL6 stick was sent the second time, it's annoying that Offtek don't
mention the varying CL rating on their site like Crucial's does.

It's not splitting hairs to want the CL rating to b the same is it, or
is this not worth bothering with? Or, has my BIOS amendment now made
them run the same? I don't want to get fussy about it, or with
Offtek, if it's not going to be noticeable.)

poachedeggs wrote:
Well, the context is the key here. Since you're seeing 266, 333, 400, 533,
that would seem to correspond to DDR2-533, DDR2-667, DDR2-800, DDR2-1066.
So 400 would be the setting to use for DDR2-800. And CPUZ should show
400, as CPUZ shows the clock frequency, rather than the (double data rate)
bus transfer rate.

You could try page 47 here.

http://support.amd.com/us/Processor_TechDocs/41256.pdf

"DRAM Controller (DCT)

DCT0 controls channel A DDR pins and DCT1 controls channel B DDR pins.
However, the processor may be configured:

(1) to behave as a single dual-channel DCT; this is called ganged mode; or

(2) to behave as two single-channel DCTs; this is called unganged mode.

A logical DIMM is either one 64-bit DIMM (as in unganged mode) or two
identical DIMMs in parallel to create a 128-bit interface (as in ganged
mode)."

To me, that terminology seems appropriate for a Phenom, which has ganged
and unganged as choices. At some point in your BIOS, there may have been
a choice for ganged or unganged, and maybe that is why you're seeing
mention of DCT 0 and DCT 1 in the memory setup. I thought unganged was
the default on quad cores, as it works better for multiple threads
of execution. Some enthusiast site benchmarks, may help you decide which
mode to use with your dual core.

You can see here, both ganged and unganged, have only one table of numbers.
And those numbers are the current operating conditions.

http://ixbtlabs.com/articles3/cpu/am...ganged-p1.html

I don't know that much about *all* the RAM settings. I can tell you the
most important one is CAS, with tRCD running a close second. A lot of the
others, are for those people with a lot of time on their hands :-) For those,
you can leave the settings at Auto. If you look at my screen, you'd probably
catch me setting 5-5-5-18 and leaving the rest at Auto, out of sheer boredom.

To clarify, CPUZ has an info dump for the contents of each DIMM SPD chip.
The SPD chip is a flash memory on the DIMM, that stores 256 bytes of
information. The contents of the SPD won't change, as you work in the BIOS.
The purpose of the SPD, is for the DIMM manufacturer to record the recommended
timings (whatever that means). If you selected "Auto" for the memory,
then the BIOS would work out all the timings, using the info it gets from
the SPD. In your case, it didn't seem to be succeeding at that.

The SPD is "read only". The memory controller is what gets written with
the proposed settings.

There is also a page in CPUZ, that shows the current settings being used to
drive all the DIMMs. That is the information shown under the "Memory" tab.
You would hope to see 5-5-5-18 there, after manually setting the BIOS
memory control page to 5-5-5-18.

The "Command Rate" field, controls address/command transfers.
Command Rate 1T present an address on the bus, for one clock cycle.
The setup time to the memory, is from when the address pin values
start to change, until the edge of the clock at the module. That
is pretty tight timing, and that mode might work best with one
DIMM per channel.

A Command Rate 2T setting, presents the address info for two cycles.
The address is strobed on the second cycle, and the available setup time
to clock edge by doing that, is a bit longer. Command Rate 2T
is a more relaxed setting. It is used to support four DIMMs. It is
used to support two DIMMs, when the DIMMs are running at extremely
high clock rates. I don't really have a good feeling now, for when
I'm supposed to be switching to 1T on modern boards. I haven't even
played with that on my latest board (yet). (As you can probably
tell, I'm a bit lazy :-) )

Paul

poachedeggs wrote:
Well, is this info a typo ?

JEDEC #1 4.0-4-4-12-16 @ 266 MHz
JEDEC #2 5.0-5-5-18-23 @ 400 MHz
JEDEC #3 6.0-5-5-18-23 @ 400 MHz <---

I thought I saw both sticks sharing this available setting.
Each SPD has this line in it.

JEDEC #2 5.0-5-5-18-23 @ 400 MHz

And based on that, that is why I've been telling you
to set up DDR2-800 5-5-5-18. Because you've got me
convinced both sticks support that timing. I wouldn't
particularly try to force a timing, that one of the
sticks didn't support, on purpose. Unless you had
indicated a preference to live on the "wild side".

Something else you should not lose sight of, is how
SPD is used with various "classes" of memory products.
On the hum-drum generic "valueram", the SPD should
contain exactly what timing the memory supports.
DDR2-800 CAS5 would be the industry average value,
so the memory above would seem to be ordinary.

For enthusiast RAM, the manufacturer gives you a
datasheet. It contains the tested memory conditions.
The info they give might be "4-4-4-12-16 at 2.0 volts".
If you looked at the SPD on that DIMM, it might read
"5-5-5-18" and the DDR2 speed might be less than you
were expecting. They put a "bogus" value in the SPD, to
promote the ability of the BIOS to start the first
time. It is then up to the user, to dial in the
correct manual settings "4-4-4-12" in the BIOS screen,
such that the memory has the correct settings on the
second POST. That would also include a trip to the
Vdimm BIOS setting, bumping Vdimm to 2.0 volts.
A person would then use memtest86+ to test the memory,
and see if the datasheet settings were being met. If
the memory failed at this point (4-4-4-12 2.0V), you'd
send it back. If it worked at 4-4-4-12 2.0V, then you'd
dial down the voltage to 1.9 volts and retest. You'd use
as much voltage as is required for stability.

So the SPD can either be relied upon, to reflect the
correct values. Or in the case of "enthusiast" memory,
the SPD is only there to get the BIOS to POST, so that
the user can set the values manually. The datasheet may
be the only documentation that reflects the tested
results.

Paul

On Feb 27, 6:50*am, Paul <nos... (AT) needed (DOT) com> wrote:
No typos there, no - I cut and paste the details. Did you mean why is
400 mhz showing up twice for one stick (under Jedec 2 and 3), or were
you asking if the 6 should be a 5?

But it is true that from the CPU=Z reading both support 5 5 5 18 23
(or have I forced that with the BIOS settings, with potential risks?).

Should I be sending one stick back? And if so should it be the CL6
one or the CL5 one if they prove to differ when I look? (if there is
no other reason why these readings differ) or is the fact that they
both support ...5... plenty good enough. I hope I've twigged at least
that CL5 is 'better'?

Thanks for your help, marvellous efforts. I'll get the side off and
read the sticks in a second, managed ot forget to do this before I
switched on just now...

poachedeggs wrote:
Well, you have two options.

You can continue to work on your current two sticks, set
the timings, verify in CPUZ, test with memtest86+ and Prime95
stress test. Maybe you'll get dual channel operation, and
CAS 5 timing from that.

You can swap one of the sticks for a matching one. The
new stick may work better or worse than the previous one.
Presumably, they're most likely to be able to match the
one you got recently.

As for the two lines of info in the SPD, I don't get how
there are two lines for the same clock speed.

JEDEC #2 5.0-5-5-18-23 @ 400 MHz
JEDEC #3 6.0-5-5-18-23 @ 400 MHz

I can't find a copy of JEDEC 4_01_02_10R13.pdf right now
(I think that is the one for DDR2), but I think how it works
is the timing table has a clock period listed as a function
of CAS. It starts at some CAS value, plus up to two adjacent
CAS values. So if the fastest timing is CAS4, you could have
CAS4, CAS4 and CAS5, or all three of them can have entries.

CAS4 Clock_period
CAS5 Clock_period_of_a_slightly_higher_clock_speed
CAS6 Clock_period_of_an_even_higher_clock_speed

In your SPD table, it looks like the clock speed for those
last two entries, has the same value. The clock period at
400MHz would be 2.5 nanoseconds, so the SPD would have
2.5 nanoseconds stored for both the CAS5 and CAS6 entry.
Strictly speaking, that violates some kind of rule. So
if I was attempting to match DIMMs, I probably wouldn't want
to match that one. I'd want to match the slightly more
sane DIMM with respect to SPD.

DIMMs seem to be full of SPD errors of one sort and another.
Probably the worst one I've been called on to comment about,
was a DIMM where the SPD got the capacity of the DIMM wrong.
And yet the BIOS didn't crash, which is a testament to BIOS
design :-) The BIOS has a backup procedure it uses, to verify
the size of DIMMs, which is why it didn't crash.

For your other DIMM, this table looks a bit more reasonable,
in that each CAS has a unique clock speed associated with it.
So no two entries here, have the same clock_period value
in their table entries.

JEDEC #1 3.0-3-3-9-12 @ 200 MHz
JEDEC #2 4.0-4-4-12-16 @ 266 MHz
JEDEC #3 5.0-5-5-18-23 @ 400 MHz

Paul