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#31
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On 16 Nov 2006 15:02:04 GMT Arno Wagner <me (AT) privacy (DOT) net> wrote in Message id: <4s3crcFthuckU1 (AT) mid (DOT) individual.net>: That is wrong. The beep codes are produced by the keyboard MCU and that will beep a "CPU not present" if it is not contacted by the CPU after a certain time. Proof please. The beep codes are generated from the 8254 timer chip, which must be programmed by the processor. If the processor is missing or cannot do code/data fetches from the BIOS ROM, there are *no* post codes. Period. |
#32
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On 18 Nov 2006 21:19:53 GMT, Arno Wagner <me (AT) privacy (DOT) net> put finger to keyboard and composed: In comp.sys.ibm.pc.hardware.misc Franc Zabkar <fzabkar (AT) iinternode (DOT) on.net> wrote: On 18 Nov 2006 02:38:27 GMT, Arno Wagner <me (AT) privacy (DOT) net> put finger to keyboard and composed: In comp.sys.ibm.pc.hardware.misc Franc Zabkar <fzabkar (AT) iinternode (DOT) on.net> wrote: On 17 Nov 2006 23:54:02 GMT, Arno Wagner <me (AT) privacy (DOT) net> put finger to keyboard and composed: In comp.sys.ibm.pc.hardware.misc Trent <none (AT) dev (DOT) nul.pissoff> wrote: On 16 Nov 2006 15:02:04 GMT Arno Wagner <me (AT) privacy (DOT) net> wrote in Message id: <4s3crcFthuckU1 (AT) mid (DOT) individual.net>: That is wrong. The beep codes are produced by the keyboard MCU and that will beep a "CPU not present" if it is not contacted by the CPU after a certain time. Proof please. The beep codes are generated from the 8254 timer chip, which must be programmed by the processor. If the processor is missing or cannot do code/data fetches from the BIOS ROM, there are *no* post codes. Period. Since your information is wrong, I don't feel I have to proof anything. Yes, you do. But please remain unenlightened, if you want. Otherwise have a look at the schematics again. Should be at least PC-AT, since I think the original PC and XT actually could not do this AFAIK. Arno I have the original IBM PC/AT Technical Reference Manual. Here are scans of the relevant circuits: http://www.users.on.net/~fzabkar/PC-AT/ Note that the speaker is driven by an 8254 timer gated with speaker data from "Port B", ie I/O port 61h. There is no connection between the 8042 keyboard controller and the speaker. Ok, so you did actually look. In my PC-AT schematics, I/O D1 from the 8042 (U126) is connected to the Speaker via U127 (ALS175, a quad D-Flip flop) and mixed together with the output of the 8254 (U103) in U92. Yes, ordinarily the AND-gate acts as a gate. But it can be used as mixer as well, if the signal from the 8254 is "1". Arno Look again. I/O D1 from the 8042 is connected to a shared data bus. This data bus is controlled by the host CPU, not the 8042. No. This is a Tri-State bus and (given the right arbitration) every device can write to it. Every device *may* be able to write to the bus and in so doing exchange data with the host CPU, but not every device can write to every *other* device. |
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In any case the clock for U127 is "-PortB WR" which is also generated by the host CPU via an Out instruction to port 61h. The 8042 has *no way* of clocking data through U127. You have no way of knowing this. The 8042 may be able to write to 61h. The 8042 *does not* control the data bus. In fact there are 14 pages which describe in detail what the keyboard controller actually does. These pages also contain an additional simplified functional diagram. |
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Don't forget that this is the I/O bus, not the normal CPU memory bus. The I/O bus is derived from the host CPU's data bus. The "-PortB WR" clock signal is derived from the CPU's M/IO* pin. See pages 1,2,15, and 18 of your own copy of the schematics. |
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However, given that some data is missing, e.g. the PROM data, I don't know. Page 1-30 of the manual states: ================================================== =================== The system unit has a 2-1/4 inch permanent-magnet speaker which can be drive from: . The I/O-port output bit . The timer/counter's clock out . Both ================================================== =================== Page 1-10 has a simplified circuit diagram which may be easier for you to understand: http://www.users.on.net/~fzabkar/PC-AT/TimerCounter.jpg Sorry, don't need that and please can your arrogance. Pot kettle black. "Since your information is wrong, I don't feel I have to proof anything. But please remain unenlightened, if you want." |
#33
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On 18 Nov 2006 21:19:53 GMT, Arno Wagner <me (AT) privacy (DOT) net> put finger to keyboard and composed: In comp.sys.ibm.pc.hardware.misc Franc Zabkar <fzabkar (AT) iinternode (DOT) on.net> wrote: On 18 Nov 2006 02:38:27 GMT, Arno Wagner <me (AT) privacy (DOT) net> put finger to keyboard and composed: In comp.sys.ibm.pc.hardware.misc Franc Zabkar <fzabkar (AT) iinternode (DOT) on.net> wrote: On 17 Nov 2006 23:54:02 GMT, Arno Wagner <me (AT) privacy (DOT) net> put finger to keyboard and composed: In comp.sys.ibm.pc.hardware.misc Trent <none (AT) dev (DOT) nul.pissoff> wrote: On 16 Nov 2006 15:02:04 GMT Arno Wagner <me (AT) privacy (DOT) net> wrote in Message id: <4s3crcFthuckU1 (AT) mid (DOT) individual.net>: That is wrong. The beep codes are produced by the keyboard MCU and that will beep a "CPU not present" if it is not contacted by the CPU after a certain time. |
#34
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On Fri, 17 Nov 2006 05:20:07 -0500, Trent <none (AT) dev (DOT) nul.pissoff wrote: On 16 Nov 2006 15:02:04 GMT Arno Wagner <me (AT) privacy (DOT) net> wrote in Message id: <4s3crcFthuckU1 (AT) mid (DOT) individual.net>: That is wrong. The beep codes are produced by the keyboard MCU and that will beep a "CPU not present" if it is not contacted by the CPU after a certain time. Proof please. The beep codes are generated from the 8254 timer chip, which must be programmed by the processor. If the processor is missing or cannot do code/data fetches from the BIOS ROM, there are *no* post codes. Period. That is definitely false. I have pretty extensive experience on HP's Business Desktop line, and every one of them will give you a beep code (3 beeps) if there is no processor installed in the system. See page A-13 from the following document: http://h20000.www2.hp.com/bizsupport...Fc00368814.pdf |
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Dell has a similar code for their new Dimensions, where only light 3 of their diagnostics lights is on: http://support.dell.com/support/edoc....htm#wp1064555 |
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Note that these codes are NOT generated by any "8254 timer chip" as such chips haven't existed on motherboards for 10+ years now. The functionality of the 8254 timer chip has been incorporated into the motherboard chipset, typically in the I/O controller or southbridge. This is also where the "Keyboard MCU" resides and it's also where the POST beeps (or blinking lights, or voice warnings on some new systems) come from. This is not some XT or AT system we're talking about here, things have changed quite a bit in the past 25 years. |
#35
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On Fri, 17 Nov 2006 05:20:07 -0500, Trent <none (AT) dev (DOT) nul.pissoff wrote: On 16 Nov 2006 15:02:04 GMT Arno Wagner <me (AT) privacy (DOT) net> wrote in Message id: <4s3crcFthuckU1 (AT) mid (DOT) individual.net>: That is wrong. The beep codes are produced by the keyboard MCU and that will beep a "CPU not present" if it is not contacted by the CPU after a certain time. Proof please. The beep codes are generated from the 8254 timer chip, which must be programmed by the processor. If the processor is missing or cannot do code/data fetches from the BIOS ROM, there are *no* post codes. Period. That is definitely false. I have pretty extensive experience on HP's Business Desktop line, and every one of them will give you a beep code (3 beeps) if there is no processor installed in the system. See page A-13 from the following document: http://h20000.www2.hp.com/bizsupport...Fc00368814.pdf |
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Dell has a similar code for their new Dimensions, where only light 3 of their diagnostics lights is on: http://support.dell.com/support/edoc....htm#wp1064555 |
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Note that these codes are NOT generated by any "8254 timer chip" as such chips haven't existed on motherboards for 10+ years now. |
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The functionality of the 8254 timer chip has been incorporated into the motherboard chipset, typically in the I/O controller or southbridge. This is also where the "Keyboard MCU" resides and it's also where the POST beeps (or blinking lights, or voice warnings on some new systems) come from. |
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This is not some XT or AT system we're talking about here, things have changed quite a bit in the past 25 years. |
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---------------------------- Tony Hill hilla <underscore> 20 <at> yahoo <dot> ca |
#36
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In comp.sys.ibm.pc.hardware.misc Franc Zabkar <fzabkar (AT) iinternode (DOT) on.net> wrote: On 18 Nov 2006 21:19:53 GMT, Arno Wagner <me (AT) privacy (DOT) net> put finger to keyboard and composed: I have the original IBM PC/AT Technical Reference Manual. Here are scans of the relevant circuits: http://www.users.on.net/~fzabkar/PC-AT/ Note that the speaker is driven by an 8254 timer gated with speaker data from "Port B", ie I/O port 61h. There is no connection between the 8042 keyboard controller and the speaker. Ok, so you did actually look. In my PC-AT schematics, I/O D1 from the 8042 (U126) is connected to the Speaker via U127 (ALS175, a quad D-Flip flop) and mixed together with the output of the 8254 (U103) in U92. Yes, ordinarily the AND-gate acts as a gate. But it can be used as mixer as well, if the signal from the 8254 is "1". Arno Look again. I/O D1 from the 8042 is connected to a shared data bus. This data bus is controlled by the host CPU, not the 8042. No. This is a Tri-State bus and (given the right arbitration) every device can write to it. Every device *may* be able to write to the bus and in so doing exchange data with the host CPU, but not every device can write to every *other* device. Yes, and actually most cannot, since the address lines and handshaking lines are pure inputs. For the 8042 this is not true. It has general purpose I/O and just pretends to be a memory-mapped I/O device. |
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In any case the clock for U127 is "-PortB WR" which is also generated by the host CPU via an Out instruction to port 61h. The 8042 has *no way* of clocking data through U127. You have no way of knowing this. The 8042 may be able to write to 61h. The 8042 *does not* control the data bus. In fact there are 14 pages which describe in detail what the keyboard controller actually does. These pages also contain an additional simplified functional diagram. The 8042 can do a lot of things not in the normal operation description. For example, it can control any signal deliverd to it. |
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Don't forget that this is the I/O bus, not the normal CPU memory bus. The I/O bus is derived from the host CPU's data bus. The "-PortB WR" clock signal is derived from the CPU's M/IO* pin. See pages 1,2,15, and 18 of your own copy of the schematics. Well. I think this discussion has reached the end of its usefulness. See my other posting. |
#37
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In comp.sys.ibm.pc.hardware.misc Trent <none (AT) dev (DOT) nul.pissoff> wrote: On 16 Nov 2006 15:02:04 GMT Arno Wagner <me (AT) privacy (DOT) net> wrote in Message id: <4s3crcFthuckU1 (AT) mid (DOT) individual.net>: That is wrong. The beep codes are produced by the keyboard MCU and that will beep a "CPU not present" if it is not contacted by the CPU after a certain time. Proof please. The beep codes are generated from the 8254 timer chip, which must be programmed by the processor. If the processor is missing or cannot do code/data fetches from the BIOS ROM, there are *no* post codes. Period. Since your information is wrong, I don't feel I have to proof anything. But please remain unenlightened, if you want. |
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Otherwise have a look at the schematics again. Should be at least PC-AT, |
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since I think the original PC and XT actually could not do this AFAIK. |
#38
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Ok, whether or not the original IBM AT could beek a "CPU missing" is really besides the point. More important is what amodern PC mainboard would do. In order to find out, I just hookes an EPOX EP8-KRA2+ up to a PSU and speaker. This board also has a POST display, which hung at "FF" as expected. In addition there were no beeps, so I retract my earlier statement: A modern mainboard does not necessarily beep when the CPU is missing. |
#39
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On Fri, 17 Nov 2006 05:20:07 -0500, Trent <none (AT) dev (DOT) nul.pissoff wrote: On 16 Nov 2006 15:02:04 GMT Arno Wagner <me (AT) privacy (DOT) net> wrote in Message id: <4s3crcFthuckU1 (AT) mid (DOT) individual.net>: That is wrong. The beep codes are produced by the keyboard MCU and that will beep a "CPU not present" if it is not contacted by the CPU after a certain time. Proof please. The beep codes are generated from the 8254 timer chip, which must be programmed by the processor. If the processor is missing or cannot do code/data fetches from the BIOS ROM, there are *no* post codes. Period. That is definitely false. I have pretty extensive experience on HP's Business Desktop line, and every one of them will give you a beep code (3 beeps) if there is no processor installed in the system. See page A-13 from the following document: http://h20000.www2.hp.com/bizsupport...Fc00368814.pdf |
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Dell has a similar code for their new Dimensions, where only light 3 of their diagnostics lights is on: http://support.dell.com/support/edoc....htm#wp1064555 |
|
Note that these codes are NOT generated by any "8254 timer chip" as such chips haven't existed on motherboards for 10+ years now. The functionality of the 8254 timer chip has been incorporated into the motherboard chipset, typically in the I/O controller or southbridge. |
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This is also where the "Keyboard MCU" resides and it's also where the POST beeps (or blinking lights, or voice warnings on some new systems) come from. |
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This is not some XT or AT system we're talking about here, things have changed quite a bit in the past 25 years. |
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---------------------------- Tony Hill hilla <underscore> 20 <at> yahoo <dot> ca |
#40
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Still I would say that many beep codes are handled totally independently of the processor. Certainly the "CPU Not detected" is, and same for "power supply overloaded". |
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Others like "CPU fan not detected" are also probably independent of the processor. |
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Obviously all of this is highly dependent on the individual BIOS and chipset of the system board. |
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